This project has no doubt been a challenge.  We voluntarily chose a design that is very control based which means that timing and FSM design are of the utmost importance. Naturally we are very pleased with the outcome of this year - a complete, fully functional processor. We hope you enjoyed getting to know our project!

References:
Weste, Neil & Eshraghian, Karman. Principles of CMOS VLSI Design, Second Edition. 1993.

Karplus, Kevin. “A formal model for MOS clocking disciplines.” 1984.

Noice, David; Mathews, Rob; Newkirk, John. “A clocking discipline for two-phase digital systems.”

Division of Labor:
Aamir: Initial project idea, functional description, initial logic, algorithm flow, finite state machines, PLAs, control description, timing description, sub-cell layout, floorplan, system integration, system simulation, CIF process, project report, presentation.

Robert: Initial project idea and prospect, functional description, initial logic, algorithm flow, PLAs, system integration, system simulation, CIF process, LabVIEW simulator / test case generator, project report, presentation, webmaster.

Sara: Initial project idea, functional description, initial logic, algorithm flow, finite state machines, control description, timing description, sub-cell layout, system integration, system routing, system simulation, project report, presentation.

*(special thanks to Group Q for the Division of Labor template).

Comments and suggestions on CAD tools:

• CAD tools weren’t designed well for modularity.
• Labelling mechanisms weren’t the most intuitive.
• Changing versions of Magic at the last moment did nothing to help our productivity.
• Crystal behavior with a two-phase clock was very unclear.