Setup

We built a breadboard that would house our processor and the external memory. The processor needed to send two complementary signals to the memory chip to conrol writing, but to limit pins we only used a WriteEnable signal to switch high for writing to begin; we used an inverter to send the complement to memory as well. The buffer allowed us to alternate between programming memory and running our processor without having to rearrange the entire breadboard. You can also see that we arranged our processor to be able to read from and write to memory.

The chips we used for OmniLab testing were:

  1. ARSE – the finest instruction scheduler this side of Will Rice
  2. DS1230 --  Dallas Semiconductor 120ns SRAM chip
  3. 74LV244 – Philips Semiconductor octal tri-state buffer chip (2 of these)
  4. DM74LS04 – Fairchild Semiconductor hex inverter chip  

Our method for testing ARSE was to first program memory with a set of 8 instructions, then run these instructions through ARSE, and finally read the memory to see which instructions were reordered or changed.  The initial plan to do this was to have two boards, one to read/write to memory, and one for chip testing. We thought this would be easiest as there would be no need for buffering and, since the memory chips were nonvolatile, transferring between boards should have not been a problem. However, due either to the age of the memory chips or some other malfunction, they behaved in a decidedly volatile manner, forcing us to do all of our testing on one board with power applied at all times.  This led to our board setup with buffers between the output of the Omnilab station and memory.  We had more than 8 outputs (all 8 data bits plus memory addressing, memory writing and buffer enable signals) so we needed two buffers.  The addressing and memory writing outputs were enabled during reading and writing and the data bits were enabled just during writing.  The memory values were always available as inputs to Omnilab so we could see that programming was happening correctly.

When actually running ARSE, the data, address, and memory write bits were connected only to ARSE and the memory. Our chip put out a single write to memory signal (that was actually a “read from memory” signal, as it was polarized incorrectly) and we needed both it and its compliment for memory, since it had “write” and “read” pins that needed to be driven. For this we used the inverter. We could have designed our chip to output both of these signals but this would essentially have wasted a pin and we felt an off-chip inverter was a better solution.

For reference, our “pin” connection files for Omnilab are located here:

pin.pin
in.in