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Project Milestones
- Week 16 - Web page / Final Report completed.
Week 16 - Final routing and integration completed. Week 16 - Overall chip testing completed.
- Week 15 - Project presentations for Rice/AMD Annual VLSI Design Competition. We won second place!
Week 15 - More wiring and integration
Week 15 - Testing of large-scale “Sections.”
- Week 14 - Wiring and integration
Week 14 - Prepared for presentations
- Week 13 - Web page updated
Week 13 - Algorithm FSM finalized Week 13 - Most subcells have been created at this point.
- Week 12 - New block diagram (JPG, PDF)
Week 12 - State diagram for main algorithm FSM (JPG, PDF) Week 12 - Flowchart for main algorithm (JPG, PDF)
- Week 11 - Memory moved off chip; block diagram, logic and timing were redesigned to reflect this. From here we are able to start integration.
- Week 10 - Glue logic and adders created. Timing tested extensively
Week 10 - Dependency checker tested extensively and revised to correct small errors (DOC, PDF).
- Week 9 - Static memory cells created and tested.
- Week 8 - No reports due
- Week 7 - Initial circuit sub-cell layout complete (JPG).
- Week 7 - Web page updated
- Week 6 - Combinational logic for Dependency Checker (DOC, PDF)
- Week 6 - Finite State Machine diagrams (DOC, PDF)
- Week 5 - Milestone 3 Report (DOC, PDF)
- Week 4 - Web page is up.
- Week 3 - Block diagram image scanned (JPG).
- Week 3 - Milestone 2 Report (DOC, PDF)
- Week 2 - Mars Lander plans foiled. Exploring possible alternatives.
- Week 1 - Group formed, initial idea: Mars Lander.
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