This page is for Elec422, VLSI Design I  (fall 2000).

The ultimate goal of this class is to develop and have fabricated a chip of 5,000 transistors that performs some simple yet interesting task. Our group has decided to investigate a hardware-based instruction scheduler. Here’s the 50-word description we gave to MOSIS, the company that fabricates our processors for us:

This chip is an instruction scheduler. It operates on a simple 8-long block of 8-bit instructions, which are found in off-chip memory.  The chip determines which instructions can and should be reordered, using our dependency and reordering algorithms, and then reorders them in the off-chip memory.

To the left you can find navigation bars to direct you to more specific information on our project.  For a more detailed overview of our project, start here.